发明名称 NONVOLATILE SEMICONDUCTOR MEMORY
摘要 <p>PURPOSE:To electrically erase data in the unit of byte by connecting a switching TR between a serial circuit and an erasing line, selectively controlling the turning on/off of said TR to impress an erasing voltage to an erase gate in a specific serial circuit. CONSTITUTION:In the figure of equivalent circuit, the serial circuit 10 consists of eight pieces of memory cells 11 in serial connection. Each cell 11 contains a source area and a drain area, a floating gate provided on a channel area between said two areas, an erasing gate superposed on said electrode, and a control gate. The circuits 10 are arranged in a matrix formation, and one end of the circuit 10 is connected to a bit line and the other end is to a ground line. The control gates of the eight pieces of cells 11 of the circuit 10 are connected to eight pieces of row lines, and these are wired in common for the circuits 10 in the row-direction. The common erasing gate of the circuits 10 arranged in the same row is connected to one of the erasing lines via the switching TR 16, and the control gates of plural pieces of the TRs 16 are connected in common with one erase-selection line.</p>
申请公布号 JPS63268194(A) 申请公布日期 1988.11.04
申请号 JP19870101426 申请日期 1987.04.24
申请人 TOSHIBA CORP 发明人 MASUOKA FUJIO
分类号 G11C17/00;G11C16/02;G11C16/04;G11C16/06 主分类号 G11C17/00
代理机构 代理人
主权项
地址