发明名称
摘要 PURPOSE:To shorten the channel switching time and improve S/N, by setting the product between the frequency modulation sensitivity of a voltage tuning oscillator and the frequency division ratio of a variable frequency divider to a constant approximately within a range of the operating frequency. CONSTITUTION:An oscillation frequency fV of a voltage tuning oscillator 1 not only has a signal output fout taken out but also is applied to a mixer 3 through an amplifier 2, and the differential frequency between this oscillation frequency and a reference frequency fR is applied from the mixer 3 to a variable frequency divider 6. The frequency fR is set to a frequency slightly higher than the frequency fV by multiplying an oscillation frequency fO of a quartz oscillator 4 M- number times in a multiplier 5. The frequency divider 6 divides the input frequency to 1/N and inputs the divided frequency to a phase comparator 7. The comparator 6 compares the phase of the signal from the frequency divider 6 with that of an output frequency fr of a fixed frequency divider 8 which divides the frequency fO to 1/K, and the oscillator 1 is controlled through an LPF9 by the differential output to constitute a PLL. A modulation sensitivity KV of the oscillator 1, the frequency division ratio N, and frequencies fV, fR, and fr are so set that the product between the modulation sensitivity KV and 1/N is constant approximately in the used frequency, thereby shortening the frequency switching time and reducing the noise to the oscillator 1.
申请公布号 JPS6355814(B2) 申请公布日期 1988.11.04
申请号 JP19810162869 申请日期 1981.10.14
申请人 HITACHI LTD 发明人 KANEKO YOICHI;NAKAGAWA JUNICHI;YAMASHITA KIICHI;KIMURA KATSUHIRO
分类号 H03L7/18;H03L7/185 主分类号 H03L7/18
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