发明名称 |
SEMICONDUCTOR DEVICE AND ITS MANUFACTURE |
摘要 |
PURPOSE:To prevent a lowering in resolution of a resist pattern and dimensional accuracy by a method wherein the surface of in Si substrate where a memory cell is formed is excavated directly and is made low with respect to a peripheral circuit including its neighborhood. CONSTITUTION:An opening of a resist pattern 2 formed on an Si substrate 1 is used as a region 3 to form a memory cell; the Si is dry-etched by making use of a resist as a mask. An etching depth is about one half of a difference between average heights in a finished state of the memory cell part and a peripheral circuit part. The resist 2 is removed; an Si substrate 1' whose region to form the memory cell is recessed is formed. Memory circuits 4 and peripheral circuits 5 are formed by using an ordinary method. If the surface of a semiconductor to form the memory cell is dug down with reference to a region of the peripheral circuit, an average difference between a memory cell region whose average height has become high and a region of the peripheral circuit is limited; both regions can be set within the allowable depth of the focus of an aligner. |
申请公布号 |
JPS63266866(A) |
申请公布日期 |
1988.11.02 |
申请号 |
JP19870099741 |
申请日期 |
1987.04.24 |
申请人 |
HITACHI LTD |
发明人 |
TANAKA TOSHIHIKO;HASEGAWA NORIO;KAWAMOTO YOSHIFUMI;KIMURA SHINICHIRO;KAGA TORU;KURE TOKUO |
分类号 |
H01L21/302;H01L21/3065;H01L21/8234;H01L21/8242;H01L27/088;H01L27/10;H01L27/105;H01L27/108 |
主分类号 |
H01L21/302 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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