| 摘要 |
PURPOSE:To prevent a processor from operating while the digital arithmetic result of equipment is actually in an overflow state by adjusting the signal level of an input signal to the equipment over a look at the frequency of appearance of an overflow display on a display part. CONSTITUTION:A means OL detects whether or not the output signal data of an accumulator ACC which accumulates the output signal data from a multiplier MUL enters a specific margin area set previously for the state of real overloading of the output data of the accumulator ACC. A signal outputted from an overflow detecting circuit OL to an output terminal (x) is supplied, for example,the display part to make a visible display on the display part. When the output signal data of the accumulator ACC reaches the predetermined margin area before the state of real overloading state is entered, measures such as variation in the level of the signal are taken according to, for example, the visual display made on the display part. |
