发明名称 COMPLEMENTARY MOS INTEGRATED CIRCUIT DEVICE
摘要 PURPOSE:To prevent a failure due to latchup and improve the integration and mobility of this device by providing fine dissimilar materials having a large nucleation density on an isolation layer and by preparing a single crystal semiconductor layer or a substantial single crystal semiconductor layer, thereby making to grow around a single nucleus formed at the above dissimilar materials. CONSTITUTION:A P-channel MOS transistor 3 is formed via an insulation layer 18 on an N-channel MOS transistor. As to this transistor 3, a nucleation part 17 consisting of dissimilar materials where its nucleation density is sufficiently larger than that of materials of the isolation layer 18 is provided first of all at a deposit plane 11 on the isolation layer 18, and a single crystal layer or substantial single crystal region is formed by making to grow the single crystal region or the substantial single crystal region around a single nuceus formed at the nucleation part 17. And source and drain regions 12 and 13 are formed at the single crystal semiconductor layer or substantial single crystal semiconductor layer and a gate electrode 15 is formed on the above regions through a gate insulation layer 14. The source electrode 12 and the drain region 13 are connected with interconnections 19 and 20 respectively and then the interconnection 20 is connected with an interconnection 9 through a through hole 16.
申请公布号 JPS63265463(A) 申请公布日期 1988.11.01
申请号 JP19860246811 申请日期 1986.10.17
申请人 CANON INC 发明人 OZAKI MASAHARU;YONEHARA TAKAO
分类号 H01L21/20;H01L21/205;H01L21/336;H01L21/822;H01L21/8238;H01L27/00;H01L27/06;H01L27/08;H01L27/092;H01L29/78;H01L29/786 主分类号 H01L21/20
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