发明名称 DIGITAL INTEGRATED CIRCUIT
摘要 PURPOSE:To satisfy various requirements by one LSI by preparing plural kinds of components influencing the speed and power consumption such as a resistor among components of an input buffer section and connecting them selectively in response to applications. CONSTITUTION:A buffer 1 of an input buffer section comprising an address input buffer 1 of a Bi-CMOS static RAM and level conversion circuits 2a, 2b is constituted of a level shift input stage 11, an ECL differential logic stage 12 and an emitter follower output stage 13. As resistors connected between emitters of transistors Q1-Q6 of each stage and a power voltage VEE and connected between collectors and power supply voltage VCC, two different resistance each from the resistance are prepared respectively. In forming the wiring, either of them is connected selectively.
申请公布号 JPS63263918(A) 申请公布日期 1988.10.31
申请号 JP19870097328 申请日期 1987.04.22
申请人 HITACHI LTD 发明人 MIYAMOTO KAZUHISA;MIYAOKA SHUICHI
分类号 H03K19/086 主分类号 H03K19/086
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