| 摘要 |
PURPOSE:To suppress power consumption to a low level and to improve the yield of products by effectively refreshing a word line having memory cell with deteriorated holding characteristics and to minimize the number of times of refreshment. CONSTITUTION:Receiving a timing output T1, a refresh control circuit 1 activates a refresh address counter 2 to output a refresh address increased by increment of A, A=1 and A=2 at a refresh interval T1 and to execute refresh operation. In case of an expanded refresh period T2, a timer 4 outputs a timing output T2 for refreshing a word line Wi including a cell with a small holding time to the control circuit 1. Receiving the output T2, the circuit 1 inactivates the counter 2 and inputs the address of a programmed address generator 3 to a line address buffer decoder 5 to execute refresh operation. Then, the timer 4 restarts the periodical refresh timing output at the refresh interval T1.
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