| 摘要 |
PURPOSE:To miniaturize a device and to prevent quantization distortion from being accumulated, by performing compressive conversion and extensive conversion directly between bit strings with first-order and second-order multiplexed bearer velocity. CONSTITUTION:Bit extraction is performed from the bit string with first-order bearer velocity at a constant interval, and at this time, the compressive conversion from the first-order bearer velocity to the second-order bearer velocity is performed by inserting a time quantizing bit which represents the occurrence of the change point of the first-order bearer velocity at the first half or the latter half of a bit extraction interval to a position next to an extracted bit behind the change point, and a bit pattern to expand the number of bits is generated from the combination of consecutive three bits in the bit string with the second-order bearer velocity, and the extensive conversion of the pattern from the second-order bearer velocity to the first-order bearer velocity is performed directly between the bit strings with first-order and second- order multiplexed bearer velocity. In such a way, it is possible to prevent the number of circuits from being increased and to control the quantization distortion when the switching of the bearer velocity of a multiplexed asynchronous data signal is performed.
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