发明名称 DELTA WIDTH ARITHMETIC CIRCUIT
摘要 PURPOSE:To reduce and to simplify the circuit scale and also to improve the arbitrariness of a delta width rate of change by varying a data for a delta width differentiation data ROM so as to decide optionally a value added/ subtracted to/from the delta width. CONSTITUTION:A delta width t at a time (t) is stored in a delta width register 1 and a data corresponding to an address of t in a delta width differentiation data ROM 5 is inputted to an adder/subtractor 3, where the inputted delta width t and the inputted digital data are subject to addition/subtraction. Then the result is inputted to the register 1 and an analog waveform synthesis circuit as a delta width t+1. The register 1 stores the delta width t+1 as a delta width at a time (t+1). Thus, if it is required to vary the rate of change in the delta width, it is easily varied and the circuit scale is reduced and simplified.
申请公布号 JPS63261918(A) 申请公布日期 1988.10.28
申请号 JP19870096553 申请日期 1987.04.20
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 NAGATA NAOMI
分类号 H03B28/00;H03K4/02 主分类号 H03B28/00
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