发明名称 PULSE INTERVAL DECIDING CIRCUIT
摘要 PURPOSE:To detect the value of fluctuation in pulse intervals only by the operation of reversible counters by setting initially a desired deviation value of the pulse interval in advance for a pulse interval decision system equipped with two reversible counters. CONSTITUTION:The initial deviation value alpha of the pulse interval is inputted to the reversible counters 6 and 7 through a circuit 8. The counted value of the reversible counter 6 increases continuously on the basis of a value alpha as a basic point until a next input arrives at an input terminal 20 and the counted value of the reversible counter 7 decreases continuously on the basis of the value alpha as a basic point; when it enters an underflow state, a pulse from a C/B is inputted as a clock to a D-type FF4. Consequently, the output Q' of the D-type FF4 falls and is inputted to the up/down switching terminal U/D of the reversible counter 7, which then counts up. The counters 6 and 7 both count down by a next input to the input terminal 20, but when there is another signal appearing at the terminal 20 before the counter 7 enters the underflow state firstly and then the counter 6 enters the underflow state, it is found that the pulse intervals are within the range of the deviation value.
申请公布号 JPS5992360(A) 申请公布日期 1984.05.28
申请号 JP19820203044 申请日期 1982.11.19
申请人 FUJITSU KK 发明人 FUKUSHIMA TAKEO;MORIYA TAKAO
分类号 H03K5/19;G01R23/10;G01R23/15;G01R29/02;G01R29/027 主分类号 H03K5/19
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