| 摘要 |
PURPOSE:To easily design high breakdown strength and low ON resistance by forming base and source regions in a self-alignment with a gate electrode of an annular pattern having a predetermined width as a mask. CONSTITUTION:Cell regions 3 are formed in a matrix state on a semiconductor substrate formed with an N<-> type impurity region 2 on an N<+> type impurity region 1, and a gate insulating film 4 and a gate electrode 4 are sequentially laminated on the region 2. Then, a gate electrode 5 and a gate insulating film 4 are sequentially removed by etching, P-type impurity is implanted to the region 1 with the gate electrode as a mask, a base region 7 of a periphery continued to adjacent cell region to the base region 6 of an opening is formed, and an annular source region 8 and a source region 9 are selectively formed. Then, after an interlayer insulating film 10 covered with the electrode 5 is formed, the film 10 on the regions 8, 9 is selectively removed, contacted with the regions 8, 9, and a source electrode 11 extended on the film 10 is formed. Then, a drain electrode 12 is formed on the rear surface of the region 1. |
