| 摘要 |
PURPOSE:To prevent the formation of a parasitic tapered gate MOS transistor by forming an element region by selective oxidation and a field region, removing one part of an silicon oxide film in the field region through etching and etching a bird bear section in the periphery of the element region. CONSTITUTION:A specific region in a first conductivity type semiconductor substrate 1 is used as an element region 2, and an silicon oxide film is formed into a field region 3 in the periphery of the element region 2 and a first conductivity type concentrated diffusion layer 4 to the semiconductor substrate 1 in the field region 3. One part of the silicon oxide film in the field region 3 is removed through etching, and an silicon oxide film partially used as a memory gate insulating film 5 is shaped onto the surface of the element region 2. An silicon nitride film 6 and a memory gate electrode 8 are formed onto the memory gate insulating film 5, and second conductivity type source region and drain region are shaped, employing the memory electrode 8 as a mask. An insulating film for a multilayer interconnection mainly comprising the silicon oxide film is formed, a contact window is shaped by using a photoetching technique, and a wiring metal is formed. Accordingly, the leakage currents by a parasitic tapered gate MOS transistor are reduced.
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