发明名称 Integrated semiconductor circuit arrangement having a superconducting layer, and method for producing it
摘要 A description is given of a technology for using superconducting material (4) as conductor in integrated semiconductor circuit arrangements. An insulator layer (film) (3) and/or a barrier (depletion) layer (7) are provided for the purpose of preventing the diffusion of harmful constituents of the superconducting material (4) into the semiconductor arrangement. The control of a circuit can be performed by utilising the properties of the superconducting material (4). The properties of the superconducting material (4) can be adjusted likewise. Also described is a method for forming a superconducting material layer, which is compatible over a wide field with the conventional method for producing integrated circuit arrangements. <IMAGE>
申请公布号 DE3810494(A1) 申请公布日期 1988.10.27
申请号 DE19883810494 申请日期 1988.03.28
申请人 HITACHI, LTD., TOKIO/TOKYO, JP 发明人 SUNAMI, HIDEO, TOKIO/TOKYO, JP;NISHINO, TOSHIKAZU, KAWASAKI, JP;SHUKURI, SHOJI, KOGANEI, JP;WADA, YASUO, TOKIO/TOKYO, JP;MISAWA, YUTAKA, KATSUTA, JP;KATO, TAKAHIKO, HITACHI, JP
分类号 H01L23/532;H01L39/02;H01L39/14;H01L39/24 主分类号 H01L23/532
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