| 摘要 |
PURPOSE:To transmit data at a high speed between bank memories by providing a mechanism to transmit data between the memory blocks of arbitrary bank memories that operates independently of a central processing unit. CONSTITUTION:The data transmission mechanism 1 is provided in a bank memory mechanism. In the case of transmitting a data between bank memories, the number and address of a transmission source bank memory, the number and address of a transmission destination bank memory, and a transmission-data length are set in the data transmission mechanism 1 from the central processing unit. The mechanism 1, upon receiving a data transmission command, operates independently of the central processing unit; first, selects the bank memory of the data transmission source, then reads out a data from a designated address, thereafter, selects the bank memory of the data transmission destination and writers the data in the designated fied address. The mechanism 1, thereafter, updates the address of a transmission source and that of a transmission destination, and repeats said operation to fulfill a designated data length. As a result, the data transmission between bank memories can be executed at a high speed.
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