| 摘要 |
An active probe card for high resolution/low noise wafer level testing wherein integrated circuits, such as charge coupled device imagers are tested at the wafer level before initial packaging. The probe card contains active logic and power circuits thereon with improved pin probe needles to reduce noise and distortion. The edge card connectors are eliminated and standard connectors would be used. In addition, the output signal is buffered on the probe card to reduce the effects of loading caused by the patch cable and the measuring instrument.
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