发明名称 DATA ERROR DETECTION CIRCUIT
摘要 PURPOSE:To detect two or more errors taken place in the same bit of a data by comparing contents of 1st and 2nd storage means and detecting it as an error of the output data even if the contents of both differ. CONSTITUTION:In clearing the content of a 1st counting means (count section 6a) and the content of a 2nd counting means (count section 6b) respectively, the 1st storage means (register section 4a) holds the content of a 1st parity generating means (LRC3a) in the timing and the 2nd storage means (register section 4b) holds the content of a 2nd parity generation means (LRC3a). Then a comparison means (comparator section 5) compares the content of the 1st storage means (register section 4a) with the content of the 2nd storage means (register section 4b) and when both are coincident, it is detected that there is no error in the output data, and when both differ, the presence of no error in the output data is detected. Thus, even when two or more errors take place during transfer, it is detected except a special case.
申请公布号 JPS63257334(A) 申请公布日期 1988.10.25
申请号 JP19870091263 申请日期 1987.04.14
申请人 MITSUBISHI ELECTRIC CORP 发明人 ISHII MASAHIRO
分类号 H03M13/00 主分类号 H03M13/00
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