| 摘要 |
PURPOSE:To measure a peak value of glitch by subtracting an output of an integration device receiving a master clock from an output of a D/A converter and using a peak- hole circuit so as to detect the maximum and minimum value being the result of subtraction thereby measuring the maximum value and the minimum value of an error voltage generated at the output of the D/A converter. CONSTITUTION:A master clock CLK is inputted to an n-bit counter 1. Digital codes D1-Dn being parallel outputs of the counter 1 are increased one by one bit by the clock CLK. An output (a) of an n-bit D/A converter 2 being the object of measurement receiving the digital codes D1-Bn is a stepwise waveform having a transient phenomenon (glidge) at data changeover. Then the master clock CLK is inputted to an integration device 3. Since an expected value (analog voltage) of the D/A converter 2 is obtained at the output (b) of the integration device 3, the quantized error, the capacitance error and an errorvoltage including glitch of the D/A converter 2 are obtained by subtracting the output (b) from the output (a) at the subtractor 4. In inputting the output (e) of the subtractor 4 to a peak hold circuit 5, the maximum value of the error voltage is obtained at the output (d) and the minimum value of the error voltage is detected and held at the output (e).
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