发明名称 INFORMATION PROCESSOR
摘要 PURPOSE:To degeneratively continue an operation even when no dedicated memory area for alternation is prepared, by copying the page of a memory in which an error is generated in use, on the specific page of an unused memory. CONSTITUTION:When a one-bit error is generated fixedly on a certain page in a physical memory 16, an address conversion control circuit 19 fetches a free page address from a physical page address in a free physical page stack 15 to change the allocation of the physical page address on a page map memory 13, and inputs it to an entry corresponding to the logical memory address of the page map memory 13, and copies the content of the page of the physical memory 16 with a fixed error on the specific page fetched newly. In such a way, the specific page is used for a processing hereafter, and the page with the fixed error is separated.
申请公布号 JPS63257047(A) 申请公布日期 1988.10.24
申请号 JP19870090740 申请日期 1987.04.15
申请人 AGENCY OF IND SCIENCE & TECHNOL 发明人 SUEHARA YOSHITO
分类号 G06F12/16;G06F11/16 主分类号 G06F12/16
代理机构 代理人
主权项
地址