| 摘要 |
PURPOSE:To make it possible to provide a DRAM, in which a large capacity and high integration density are implemented, by providing a memory holding capacitor at the lower part of an isolating region for a MOS transistor so as to surround the MOS transistor region. CONSTITUTION:This device has a p-type region 6, which is to become the substrate of a MOS transistor; an n-type region 7, which connects the source of the MOS transistor and a storage electrode, an isolating region 8; and a drain 10 of the MOS transistor. A memory holding capacitor 3 for a memory cell is formed so as to surround the outer part of the MOS transistor. Therefore, a large capacity can be secured with small occupying area with very high efficiency. Excellent characteristics in soft error breakdown strength against alpharays and noise margin are provided. A step for oblique ion implantation into the side wall of a groove part is not required when the storage electrode is formed. Therefore, miniaturization and a large capacity can be readily realized, and the large capacity DRAM having a high integration density can be provided. |
