| 摘要 |
PURPOSE:To prevent a parasitic MOS phenomenon and the characteristic fluctuation of a semiconductor device, and to improve reliability by forming wiring patterns so that wiring conductors having potential different from potential applied to elements are not extended onto insulating films in each element region shaped to the semiconductor substrate. CONSTITUTION:An N<+> type buried layer 2 is buried onto a P-type semiconductor substrate 1 and an N<-> type epitaxial layer 3 is formed, and a P<+> type impurity is introduced selectively to the main surface of. the substrate to shape P<+> type diffusion regions 4-1... as element regions (resistance regions). The element regions 4-1... are connected to electrode wiring layers 6-1... through opening sections 7 in an insulating film shaped onto the element regions 4-1..., and the electrode wiring layers 6-1... coat at least principal sections of the insulating film 5 on the element regions 4-1.... That is, sectional structure at a point (d) is formed in the MOS structure of the electrode wiring layer 6-1, the insulating film 5 and the P<+> type diffusion region 4-1, and quite the same potential is applied to the electrode wiring layer 6-1 and the P<+> type diffusion region 4-1 in potential at the time of circuit operation, thus generating no parasitic MOS phenomenon by other potential.
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