发明名称 OUTPUT BUFFER CIRCUIT
摘要 PURPOSE:To prevent the occurrence of offset and error in an output signal, by connecting three MOSFETs in series between a driving power supply terminal and the earth and setting respective base voltages to prescribed values which are increased in order from the earth side. CONSTITUTION:An output buffer circuit 20 is provided with three MOSFETs 22, 23, and 24 connected in series between a driving power supply terminal 21 and the earth. The output of a charge transfer device such as CCD is applied to the base of the FET24, and the output signal is obtained from the source of the FET24. Respective gate voltages VG1, VG2, and VG3 of FETs 22, 23, and 24 are set to prescribed values increased in order from the earth side. As the result, voltages between brains and gates of FETs 22, 23, and 24 are reduced to prevent the diffusion of electrons due to ionization by collision, and therefore, the occurrence of offset, error, or the like in the output signal is reduced.
申请公布号 JPS5997229(A) 申请公布日期 1984.06.05
申请号 JP19820205990 申请日期 1982.11.26
申请人 SONY KK 发明人 SATOU MAKI
分类号 H03K19/0175;H03K19/003 主分类号 H03K19/0175
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