发明名称 MANUFACTURE OF CMOS TYPE SEMICONDUCTOR DEVICE
摘要 PURPOSE:To reduce manufacturing processes, and to prevent the formation of offset structure with a gate electrode of a P<+> type diffusion layer by shaping an N<-> type diffusion layer on the PMOS transistor side once and doping a P-type impurity to form the P<+> type diffusion layer. CONSTITUTION:A P well 102 is formed selectively to an NMOS transistor forming section in a semiconductor substrate 101 and an N well 103 to a PMOS transistor forming section, and an insulating film 104 for element isolation is shaped. Gate electrodes 105A, 105B are applied and formed, and N<-> type diffusion layers 106 are shaped. The oxide film formed onto the whole surface is etched to shape side walls, N<+> type diffusion layers 110 are formed in source- drain regions in the NMOS transistor, and a P-type impurity is added into source-drain regions in a PMOS transistor in high concentration to shape P<+> type diffusion layers 114.
申请公布号 JPS63252461(A) 申请公布日期 1988.10.19
申请号 JP19870088264 申请日期 1987.04.09
申请人 NEC CORP 发明人 TOYODA NAGAYUKI
分类号 H01L21/336;H01L21/8238;H01L27/092;H01L29/78 主分类号 H01L21/336
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