发明名称 Synchronization circuit for digital communication systems
摘要 In a digital communication system, a sync word is generated at intervals at the transmitting end and appended to a data bit stream having redundant bits generated by an error correction encoder. The sync word indicates the position of the redundant bits in the data bit stream. At a receiving end of the system, a syndrome generator is responsive to the data bit stream for deriving therefrom a syndrome and applying it to the error corrector to cause it to correct error which may exist in the data bit stream. A word synchronizer detects the sync word contained in one of the syndromes and causes the syndrome generator to establish synchronism with the data bit stream. The word synchronizer includes a detector for detecting a prescribed set of binary states in the syndromes which indicate that there is no errors in the data bit stream and causing the syndrome generator to generate a syndrome synchronously with data words in the data bit stream.
申请公布号 US4779275(A) 申请公布日期 1988.10.18
申请号 US19860846451 申请日期 1986.03.31
申请人 NEC CORPORATION 发明人 YOSHIMOTO, MAKOTO
分类号 H04L7/04;(IPC1-7):G06F11/10;H04L7/06 主分类号 H04L7/04
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