发明名称 |
Forced error generating circuit for a data processing unit |
摘要 |
A forced error generating circuit for a data processing unit comprises a forced error register for generating a designation signal to forcibly cause an error for a structural element in the data processing unit and a signal generating means which receives a signal for starting a period for causing the error by a forced error generating instruction and generates a forced error generating signal corresponding to said designation signal during said period.
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申请公布号 |
US4779271(A) |
申请公布日期 |
1988.10.18 |
申请号 |
US19860928380 |
申请日期 |
1986.11.10 |
申请人 |
MITSUBISHI DENKI KABUSHIKI KAISHA |
发明人 |
SUZUKI, HIROSHI |
分类号 |
G06F11/22;G06F11/267;(IPC1-7):G06F11/00 |
主分类号 |
G06F11/22 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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