| 摘要 |
<p>PURPOSE:To simplify a cascade connecting by utilizing an AND gate and an exclusive OR (EOR) gate, setting a suitable value and attaining a feedback from the flip flop of a shift register last step to the flip flop of a shift register first step. CONSTITUTION:When the setting method of data, which set a feedbacking condition by changing the positions of AND gate and EOR gate necessary at the time of cascade connecting, is changed, the data are one-bit-shifted and read. To feedbacking condition setting data to a shift register first step, namely to the DATO of the IC of the first step, certainly 'high' level is set, the input terminal (FB)I of a first step is fixed to a 'low' level and with the AND gate (ANDc) and the EOR gate (Ec), the output of a shift register last step can be feedback to the input of the shift register first step. Thus, an external connec tion is eliminated and the cascade connecting can be simplified.</p> |
