| 摘要 |
PURPOSE:To previously prevent an area of another task from being damaged by providing the titled system with invalid access inhibiting circuits for detecting that a task accesses an area other than a writeable area to confirm the access to the area other than the writable area. CONSTITUTION:The number of invalid access inhibiting circuits 21-2n coincides with the number of writable areas. Upper and lower limit values are set up in respective circuits 21-2n by upper/lower limit registers 31-3n. All invalid access interruption signals outputted from the circuits 21-2n are inputted to an OR circuit 41 and outputted from the OR circuit 41. On the other hand, all write permission signals outputted from respective circuits 21-2n are inputted to an AND circuit 41 and then outputted. When invalid access interruption is generated from any one the circuits 21-2n, an invalid access interruption signal is outputted from the OR circuit 41. On the other hand, the write permission is outputted from the AND circuit 42 only when writable signals are outputted from all the circuits 21-2n. |
