发明名称 SEQUENCE CONTROLLER
摘要 PURPOSE:To improve a processing speed by reading out a state of an internal register, and writing it in an internal register of the next processor, before the next processor operated by synchronizing with a clock generator processes a program. CONSTITUTION:Each processor 1, 3 synchronizes with a clock generator, and executes and processes successively an instruction supplied from execution program store memories 2, 4. In this case, prior to the execution, a state of an internal register of a pre-stage processor is always written, therefore, they are operated as one piece of processor virtually. Accordingly, it will suffice that a sequence program written for one piece of sequence processing processor is stored only successively in each execution program store memory 2, 4 in order of execution of the processor, and a program which has considered mutually operations of plural processors 1, 2 is not required. Also, each processor 1, 2 executes an access to each execution program store memory 2, 4, therefore, a memory of a high speed access time is not required. In such a way, the sequence processing speed can be improved.
申请公布号 JPS63249208(A) 申请公布日期 1988.10.17
申请号 JP19870083238 申请日期 1987.04.03
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 KOMINAMI SHINYA
分类号 G05B19/05 主分类号 G05B19/05
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