DIGITAL COHERENT PSK DEMODULATOR AND DETECTOR

摘要

A digital demodulator and detector is for digital signals of serially encoded digital bits according to phase shift keying (PSK) having a predetermined carrier frequency and bit rate. A master clock oscillator has a frequency which is a multiple of the predetermined carrier frequency. A divider frequency devides the clock signal to give sampling pulses. A sampling circuit samples the encoded signal in response to the sampling pulses and a second sampling circuit stores the sample. A difference detector generates a transition signal in response to difference between the two circuit samples.