发明名称 PROGRAMMINNESSTYRT REALTIDSSYSTEM OMFATTANDE TRE I HUVUDSAK IDENTISKA PROCESSORER
摘要 A stored program controlled real time system includes a high-speed executive processor (29) which receives real time signals coming from an equipment (2) and which coacts parallel-synchronously with two substantially identical reserve processors (30, 31). The processor each contain a plurality of function units (3, 5, 6) mutually connected by a data bus (19, 20). For indicating a faulty processor, the system includes a fault localizing means (32) which contains two comparators (34, 36), each of which has its two inputs connected to the data buses of the three processors and its outputs connected to three fault indicators (42, 44, 46) each assigned to a processor. The executive processor (29) updates the reserve processors (30, 31) by means of two data transfer channels (33, 35), the inputs of which are connected to the data bus (20) of the executive processor and the outputs of which are connected to the data bus (19) of the respective reserve processor. For compensating the time delays (/d2-d1/), /d3-d1/) forced by the channels in updating, a start pulse source (48) initiates the reserve processors with substantially equal time delays, in relation to the executive processor. The data transfer channels (33, 35) used for updating can also be used for fault localization, if the channel outputs are each connected to one of the inputs of each of the comparators (34, 36), the other inputs of which are directly connected each to a data bus (20) of the reserve processors. If the equipment (2) is not capable of reliably sending the real time signals to a reserve processor (31), the signals are transmitted via the executive processor (29) and via the respective data transfer channel (35) to this reserve processor (31) which lacks connection to the equipment.
申请公布号 SE8701618(L) 申请公布日期 1988.10.17
申请号 SE19870001618 申请日期 1987.04.16
申请人 FACIT AB 发明人 OSSFELDT B E
分类号 G06F11/16;G06F11/18;(IPC1-7):G06F11/16 主分类号 G06F11/16
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