发明名称 PLL CIRCUIT
摘要 PURPOSE:To obtain a phase following-up characteristic of higher precision by providing a second phase control circuit consisting of a phase delay circuit and a selector circuit to control the phase in a cycle shorter than the reference clock period. CONSTITUTION:A first phase control circuit 3 and a second phase control circuit 6 are provided, and the first phase control circuit 3 consists of a shift register circuit 4 and a first selector circuit 5, and the second phase control circuit 6 consists of a phase delay circuit 7 and a second selector circuit 8. Since the phase is controlled in a cycle shorter than the reference clock period by the second phase control circuit 6 after the phase control precision for the input signal of a reproduced clock is driven to the reference clock precision by the first phase control circuit 3, the phase following-up characteristic of high precision and a less phase following-up error are obtained.
申请公布号 JPS63249977(A) 申请公布日期 1988.10.17
申请号 JP19870085014 申请日期 1987.04.07
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 INATOMI SHOICHI;SENOO TAKANORI
分类号 H03L7/06;G11B20/14;H03L7/10 主分类号 H03L7/06
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