发明名称 |
INPUT/OUTPUT INTERRUPT SYSTEM |
摘要 |
The system includes a CPU and an input/output device which requires an input/output interrupt. A channel progressing circuit responds to a request for input/output interrupt, propagates the request to the CPU and reports the state of the input/output device to the CPU. The channel progressing cirucit includes interrupt detecting circuitry which senses the request for input/output interrupt. Status information detecting circuitry senses whether status information sent from the input/output device to the channel progressing unit together with the request for input/output interrupt has a predetermined value. A counting device counts a predetermined constant time when the status information detecting circuitry senses the predetermined value.
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申请公布号 |
KR880002097(B1) |
申请公布日期 |
1988.10.15 |
申请号 |
KR19830004201 |
申请日期 |
1983.09.07 |
申请人 |
FUJIS LTD. |
发明人 |
MATSUBARA, YOSHIAKI;TSURU, MASSATO |
分类号 |
G06F13/00;(IPC1-7):G06F13/00 |
主分类号 |
G06F13/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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