| 摘要 |
PURPOSE:To attain high speed operation without increasing the input capacitance by providing an input logic threshold value adjustment means to increase the input logic threshold value in a 1st state more than the input logic threshold value in the state other than the 1st state. CONSTITUTION:The factor of conductance of both P-channel transistors (TRs) 5, 6 is effective more than that of an N-channel TR 8 and an input logic treshod value is higher than VCC/2. In such a state, the input signal (a) starts changing from H to L level and the input signal (a) is lower than the input logic threshold value V2, then the output signal line 2 is charged by the P-channel TRs 5, 6. Moreover, the switching TR 10 is turned off to decrease a through-current and to increase the charging current, and the output signal (b) rises quickly. The output signal (c) of the delay circuit 11 rises with a delay and the switching P-channel TR 7 is turned off and the switching N-channel TR 10 is turned on. Thus, the high speed operation is attained without increasing the input capacity. |
