SEMICONDUCTOR MEMORY DEVICE

摘要

PURPOSE:To obtain a semiconductor memory device composed of Bi-MOS's which can operate with a high speed and with low power consumption by a method wherein bit lines and sensing lines are separated by bipolar transistors and memory cells perform charging and discharging the bit lines only. CONSTITUTION:The ends of bit lines 12a/12a' and 12b/12b' opposite to the ends connected to loads 20a/20a' and 20b/20b' are connected to the bases of bipolar transistors 17a/17a' and 17b/17b'. The collectors of the bipoldr transistors 17a and 17b to which the left side bit lines 12a and 12b are connected are connected in common and connected to a sensing line 21. The collectors of the bipolar transistors 17a' and 17b' to which the right side bit lines 12a' and 12b' are connected are connected in common and connected to a sensing line 22. The sensing lines 21 and 22 are connected to a sensing amplifier and a voltage between the sensing lines 21 and 22 is detected.