发明名称 DESCRAMBLE CIRCUIT
摘要 PURPOSE:To reduce the deterioration of a descramble picture by equalizing a synchronizing signal leading level at the time of descrambling the synchronizing signal of a scrambled video signal to the synchronizing signal. CONSTITUTION:The PIN diode 27 in which the quantity of extension is controlled according to an extension quantity control voltage is provided in a synchronizing signal extension circuit 500 at the time of descrambling the scramble signal obtained by compressing the synchronizing signal by the synchronizing signal extension circuit 500 is provided. According to an extension quantity control voltage, a gain to a transistor 23 is controlled, and a control for aligning the leading level of an RF synchronizing signal after the descrambling is carried out based out based on this control voltage.
申请公布号 JPS63244986(A) 申请公布日期 1988.10.12
申请号 JP19870075887 申请日期 1987.03.31
申请人 TOSHIBA CORP 发明人 MURAKAMI TETSUYA
分类号 H04N7/171;H04N7/167 主分类号 H04N7/171
代理机构 代理人
主权项
地址