发明名称
摘要 PURPOSE:To obtain a fixed logic level when plural current switching type logic circuits are driven by one constant voltage generation circuit by making the ratio of the wiring width between the high potential side and the low potential side equal to the ratio between the emitter resistance and the collector load resistance of the circuits as they are arranged at an equispace geometrically. CONSTITUTION:A constant voltage generation circuit 20 is provided closer to a ground terminal Vcc and a power supply terminal VEE on the low voltage side. Plural current switching type logic circuits 11-14 to be driven thereby are arranged at an equispace from the farther position. Then, one outputs of the circuits 20 are each connected to the circuits 11-14 through a wiring 31 on the high potential side while other outputs thereof are connected to the circuits 11-14 through an output line 33. Power from a terminal VEE is applied to these circuits through the wiring 32 on the low potential side. In this arrangement, the ratio of width between the wiring 31 and 33 is made almost equal to the ratio between the emitter resistance and the collector load resistance composing the circuit 11-14.
申请公布号 JPS6350858(B2) 申请公布日期 1988.10.12
申请号 JP19790156150 申请日期 1979.11.30
申请人 NIPPON ELECTRIC CO 发明人 WAKAMATSU SHIGEHISA
分类号 H03K19/086;H01L21/3205;H01L21/82;H01L21/822;H01L23/52;H01L27/04;H03K19/08 主分类号 H03K19/086
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