发明名称 SEMICONDUCTOR DEVICE
摘要 PURPOSE:To realize high performance such as high speed and high reliability, by a method wherein the impurity creeping-up amount into an epitaxial layer from a buried layer just under a MOS transistor formed on a first conductivity type well is made smaller than that of buried layers just under the other transistors. CONSTITUTION:Buried layers 12A-12C and epitaxial layers 13A and 13B are formed in order on a semiconductor substrate 11. A bipolar transistor, a P- channel MOS transistor and an N-channel MOS transistor are formed on the epitaxial layers 13A and 13B or on a P-wall 23 formed thereon. The impurity creeping-up amount into the epitaxial layer 13B from the buried layer 12B and 12C just under the MOS transistor formed on the well 23 is made smaller than that of buried layers just under the other transistors. Accordingly, even in the case where the impurity concentration of the buried layers 12A-12C is increased, the augmentation of a well-junction capacitance can be restrained. Therefore, the bipolar transistor, the P-channel MOS transistor and the N- channel MOS transistor can operate with high performance.
申请公布号 JPS63244665(A) 申请公布日期 1988.10.12
申请号 JP19870075946 申请日期 1987.03.31
申请人 NEC CORP 发明人 AOMURA KUNIO
分类号 H01L21/331;H01L21/8249;H01L27/06;H01L29/73;H01L29/732 主分类号 H01L21/331
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