| 摘要 |
PURPOSE:To prevent generation of erroneous command even if a bit error rate of a line is detriorated by providing a comparator circuit connecting a band pass filter, a sampling circuit and a counter or the like continuously and comparison number of products of a count of the counter, data length of command and clock and a flip-flop. CONSTITUTION:A sampling circuit 15 uses a clock from a clock generating circuit 19 to sample the output of an amplifier circuit 4 to allow the counter 16 to count number of '1' in the data. The comparator 17 compares the number of '1', and the number of products between the length D1 of '1' of the command the clock fCLK1. When the number of 1 is close to the product, it is decided that the command signal is '1' and a signal is given to the set terminal of a S/R flip-flop 18. On the other hand, in case of D0XfCLK1 of length of '0' of the command, a signal is given to the reset terminal of the flip-flop 18. Thus, even if the bit error rate is deteriorated and a fault takes place in the command data, no erroneous command takes palce and the command '1' is identified.
|
