| 摘要 |
PURPOSE:To attain reset operation without provision of a reset input terminal by devising the circuit so that the internal reset is applied when a combination of undefined signals is supplied to >=2 external terminals. CONSTITUTION:A reset input terminal and an inverter are removed from a conventional circuit and a NAND gate 7 is provided newly instead. An input signal 'L' is fed to a write input terminal P1 and an input signal 'L' is supplied to a read input terminal P2 at the same time, then output signals of the inverters 2, 3 go both to 'H', an output signal of the NAND gate 7, that is, a reset active signal S3 goes to 'L' to apply resetting. Although both the write active signal S1 and the read active signal S2 are made active, such the state is not defined in a conventional semiconductor integrated circuit device and neither readout nor write is executed, then no hindrance is given.
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