摘要 |
PURPOSE:To restore the state into a matching enable state quickly by monitoring a phase difference between a load current and a high frequency voltage so as to predict the occurrence of a matching disable state and increasing the capacitance of a capacitor when it is judged that the mismatching is highly possible. CONSTITUTION:A phase difference detector 18 at load side outputs a phase difference detection signal V1 at load side (analog signal) corresponding to a phase difference theta1 between a high voltage vector E and a load current vector 11. When a level comparator circuit 19 outputs a signal V1 representing that the phase difference theta1 between the load current and the high frequency voltage is disabled of matching, the control of a drive means 16 is transferred into the control by a drive signal V3 outputted from a forced drive signal source 22a, and when a detection signal V2 representing a maximum capacitance is outputted from a maximum capacitance detector 21 is outputted or a detection signal V' representing the lag phase of all currents is outputted from a 2nd level comparator circuit 20, the control of the drive means 16 is switched into the control by an output signal Vd of the control circuit 14.
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