发明名称 FREQUENCY DIVIDER INTEGRATED CIRCUIT
摘要 PURPOSE:To contrive the improvement of the signal characteristic and to reduce the system cost by providing a circuit amplifying and frequency-dividing an input signal from a signal input terminal and a switching circuit selecting the changeover of an output signal of the circuit or other signal. CONSTITUTION:In a frequency divider integrated circuit 10, the frequency division operating mode frequency-dividing a 1st input signal through a route of 1st amplifier 2 frequency divider 3 switching circuit 7 2nd amplifier 8 and amplifying/outputting the result, and the amplification operation mode amplifying (without frequency dividing) a 2nd input signal through the route of 3rd amplifier 5 switching circuit 7 2nd amplifier 8 and then outputting the result are selected by a control input. Thus, the circuit is used as it is as a prescaler 20 for a PLL used at a broad frequency band. For example, when the prescaler 20 is in the frequency division mode, PLL for a high frequency signal is formed and when the prescaler 20 is in said amplification mode, the PLL for a low frequency signal is formed.
申请公布号 JPS63245125(A) 申请公布日期 1988.10.12
申请号 JP19870078547 申请日期 1987.03.31
申请人 TOSHIBA CORP 发明人 MIYAMAE KATSUHIKO
分类号 H03K23/66;H03L7/00;H03L7/08;H03L7/187 主分类号 H03K23/66
代理机构 代理人
主权项
地址