| 摘要 |
Signal processing circuitry is disclosed for processing the echo signals of echo sounders to extract the leading edge of bottom echo components of the echo signals and to provide a reading of the average area under successive leading edges. Second and later bottom echo processing is additionally disclosed. Processing is achieved with a sample and hold circuit comprising an integrator (34), a first switch (33) for switching the required echo signal portion to the integrator, storage means (C2) for storing integrated values to be displayed, and a second switch (35) for selectively coupling values from the integrator to the storage means.
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