发明名称 MULTIPROCESSOR SYSTEM
摘要 PURPOSE:To transmit data with simple processing by supplying a control signal to a data transmission means and a slave processor from a register that supplies an address signal to a decoder in a mask memory. CONSTITUTION:The mask memory 13 that supplies a selection signal to n-pieces of slave processors 14 as well as contains plural pieces of n-bit data is provided, and the register 12 that supplies an address signal to the decoder 15 in the mask memory 13 also is provided. This register is connected to a first bus 101 and supplies a data transmission means control signal to a data transmission means 11, and supplies a slave processor control signal to the n-pieces of slave processors 14. The plural pieces of n-bit data are stored in the mask memory 13, and their addresses are written in the register together with data transmission mode. In such a way, the initialization for data transmission can be executed.
申请公布号 JPS63244255(A) 申请公布日期 1988.10.11
申请号 JP19870077740 申请日期 1987.03.31
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 NAKAJIMA MASAICHI;TANIGAWA YUJI;KANEKO KATSUYUKI
分类号 G06F13/38;G06F15/16;G06F15/177 主分类号 G06F13/38
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