发明名称 MEMORY CELL FOR TWO-PORT RAM
摘要 PURPOSE:To reduce and speed up consumption power by applying a direct- coupled circuit by means of a GaAsFET and duplicating transmission gate elements for executing accessing from two ports. CONSTITUTION:When an H signal is given to a first port word line 9 when the enhancement type FET1 of a direct-coupled flip flop is turned on and an FET2 is turned off in reading, FETs 5 and 6 go to on-state and a first port read-only bit line 11 goes to L and a bit line 12 to H. All is the same as to a second port. If the H signal is given to a bit line 13, an L signal to a bit line 14 and the H signal to a second port word line 10 when the FET1 is in the on-state and the FET2 in the off-state in writing, FETs 7 and 8 are turned on, the FET2 is turned on, the FET1 is turned off, and the flip flop is inverted, whereby writing is executed in the second port. Thus, consumption power can be reduced with a high speed characteristic as it is.
申请公布号 JPS63244390(A) 申请公布日期 1988.10.11
申请号 JP19870076137 申请日期 1987.03.31
申请人 NIPPON TELEGR & TELEPH CORP <NTT> 发明人 INO MASAYUKI;SHIYUDOU HIROKI;IDA MASAO
分类号 G11C11/41;G11C11/34;G11C11/40;H01L27/10 主分类号 G11C11/41
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