发明名称 INPUT ADDRESS BUFFER CIRCUIT FOR SEMICONDUCTOR MEMORY
摘要 PURPOSE:To suppress AC fluctuation of a reference voltage by providing a reference circuit independently of each of input address buffer circuits. CONSTITUTION:Reference circuits 1, 10 generating a comparison voltage of input address voltages Ai, Aj are provided independently to each input address circuit and decoupling capacitors C1, C2 and C3, C4 different from each other are provided between a power voltage Vcc and a reference voltage Vref11 to attain AC potential stabilization in each reference circuit. Since the decoupling capacitors C1, C2 and C3, C4 independently are provided to the reference circuit provided in each input address buffer circuit taking the wire for Vcc (power supply) and GND (ground) into account, stable DC reference levels Vref1 and Vref2 preventing AC potential change are supplied.
申请公布号 JPS63244490(A) 申请公布日期 1988.10.11
申请号 JP19870080224 申请日期 1987.03.31
申请人 NEC CORP 发明人 INUKAI HIDEMORI
分类号 G11C11/408;G11C11/34 主分类号 G11C11/408
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