发明名称 OPERATION MODE DISPLAY DEVICE
摘要 PURPOSE:To display an operation mode by detecting that a prescribed address has accessed as a read-in cycle of an instruction code and storing the operation mode value defined during said accessing to an operation mode register. CONSTITUTION:When a program P1 which is under execution in a mode M1 calls out a program P2 which can be executed in a mode M2, an arithmetic processor 11 delivers the execution start address of the program P2 to an address bus 14 and at the same time delivers ''1'' to a fetch signal line 21. Then a control part 16 detects that the same value as the contents of a mode switching address register 15 is delivered to the bus 14 in a fetching cycle of instruction. Then the contents M1 of a mode register 17 are stored in a mode save register 22, and the contents M2 of a set mode value register 19 are stored in the register 17. Thus the operation mode display value of the processor 11 can be changed to M2 from M1 simultaneously with the program control is branched to P2 from P1.
申请公布号 JPS59103146(A) 申请公布日期 1984.06.14
申请号 JP19820214364 申请日期 1982.12.06
申请人 MATSUSHITA DENKI SANGYO KK 发明人 NAKANO YOSHIO;TAKANO YUTAKA
分类号 G06F7/00;G06F7/48;G06F9/06;G06F9/46;G06F12/14;G06F15/78 主分类号 G06F7/00
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