发明名称 ARRANGEMENT FOR SOFTWARE EMULATION
摘要 <p>A data processing means (10) is adapted to be controlled by sequential instructions (14), a substantial number of which comprise an operation code selected from a set of n such codes and a qualifying code selected from a set of m such codes. A store (18) having approximately n times m locations holds a series of instructions (20, 26) corresponding to a consistent combination of operating code and qualifying code. The qualifying code may be the addressing mode and a jump table (18) of 256 x 256 entries may be employed to access the instruction series (20, 26). This arrangement can be used to emulate the Intel 8088 microprocessor instruction set on a Motorola 68020 chip.</p>
申请公布号 WO1988007718(A1) 申请公布日期 1988.10.06
申请号 GB1987000202 申请日期 1987.03.24
申请人 发明人
分类号 主分类号
代理机构 代理人
主权项
地址