发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 <p>PURPOSE:To decrease the current consumption by cutting off forcibly the current path of an internal circuit even though an external clock is active when a current is applied. CONSTITUTION:When a power supply level has a rise when a power supply is applied, the transistors (TR) QP1 and QP2 are turned on with node points N2 and N5 set at a high earth level and a high power supply level respectively. When an external clock phi is kept active at a low level, the output of an inverter 17 is set at a high level with the output of a NOR circuit NO1 set at a low level and a control signal PON set at a high level respectively. Thus the current paths of an output data buffer, etc., are forcibly cut off. When the power supply level is stable at a high level, the node points N are set at low levels and the circuit NO1 produces a high output with the signal PON changed to a low level when the clock phi is set at a high level before a normal cycle. As a result, the current path of an internal circuit is forcibly cut off even though the clock phi is active when the power supply is applied.</p>
申请公布号 JPS63240609(A) 申请公布日期 1988.10.06
申请号 JP19870074901 申请日期 1987.03.27
申请人 NEC CORP 发明人 NAKAOKA YUJI
分类号 G05F3/24;G05F1/10;G05F1/56;G06F1/26;G06F1/30;G11C11/401;G11C11/407;H01L21/822;H01L27/04;H03K17/22 主分类号 G05F3/24
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