发明名称 INFORMATION PROCESSOR
摘要 PURPOSE:To perform the information input/output processing at a high speed by securing such a constitution where the input/output operations, i.e., the read/ write operations to be given to a memory of a virtual computer are performed directly by the virtual computer with no simulation carried out by a control program of a master computer. CONSTITUTION:An address converting part 1 converts an input address signal 5 and outputs a physical address signal 6 and also a port space deciding signal 7. The signal 5 is also supplied to a direct input/output deciding part 2 for direct output of an input/output enable/unable signal 8. Then an interruption deciding part 4 decides by both signals 7 and 8 whether an interruption should be given or not to a master OS via a control program of a master computer for production of an interruption signal 9. The decision of said interruption to the master OS is carried out based on a fact that the signal 5 is equal to an input/output space and the presence or absence of a direct input/output enable address. Then the signal 9 is sent to a unit which controls a memory access as well as to an interruption receiving part. Thus the information input/ output processing is carried out at a high speed.
申请公布号 JPS63240637(A) 申请公布日期 1988.10.06
申请号 JP19870075360 申请日期 1987.03.27
申请人 NEC CORP 发明人 NISHI NAOKI
分类号 G06F12/10;G06F9/46;G06F9/48 主分类号 G06F12/10
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