发明名称 SYNCHRONOUS TYPE COUNTER
摘要 PURPOSE:To simplify the constitution and to quicken the count operation by providing a count-up control gate means controlling the count-up value into 0, +1, +2 based on a two bits control signal. CONSTITUTION:The phase control counter 1 applies the phase control of a count output with three kinds of count up values of 0, +1, +2 depending on supplied two bits phase control signals B1, B2. With the phase control signals of B1=0, B2=0 for example, the most significant bit count signal MSB and the carry signal CRY are kept to the initial state and the count-up value is made substantially zero. With the relation of B1=1 and B2=0, the count-up value is to be +1 and the normal operation is executed. Moreover, in case of B1=0, B2=1, the count-up value is to be +2. Thus, the maximum gate stage number is 4 to attain high speed count and the constitution is made simple by reducing the number of transistors being components of the phase control counter.
申请公布号 JPS63240130(A) 申请公布日期 1988.10.05
申请号 JP19870071503 申请日期 1987.03.27
申请人 HITACHI LTD;HITACHI VLSI ENG CORP 发明人 UEDA MASARU;KITAMURA NOBUAKI
分类号 H03K23/40;H03K23/00;H03K23/50;H03L7/06 主分类号 H03K23/40
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