发明名称 PROGRAMMABLE LOGIC ARRAY
摘要 PURPOSE:To attain low power consumption by providing a control FET controlling the current supply to a prescribed output line to a current path of a current fed to a prescribed output line. CONSTITUTION:A control FET 25 controlling the current supply to output lines OU2-OU4 is inserted between the power supply and the output lines OU2-OU4 and a gate of each FET 25 is connected to the output line OU1. Moreover, a control FET 27 controlling the current to output lines OU6, OU7 is inserted between the output lines OU6, OU7 and the power supply and the gate of each FET 27 is connected to the output line OU5. Through the constitution above, when the level of the output line OU1 or OU5 reaches level 1, all the FETs 25 or 27 are made nonconductive and no current is given to the output lines OU2-OU4 or OU6, OU7. When no data signal is referenced, the steady-state current is not given to the output line, causing the power consumption to be reduced.
申请公布号 JPS63240129(A) 申请公布日期 1988.10.05
申请号 JP19870071871 申请日期 1987.03.27
申请人 TOSHIBA CORP 发明人 ISHII FUMI;USAMI MASAYOSHI
分类号 H03K19/00;H03K19/177 主分类号 H03K19/00
代理机构 代理人
主权项
地址